vllm-ascend-distributed-debug

Design Ascend model multistream overlap from verified source mapping, resource-aware DAGs and paired validation.

Optimize a correctness-passed Ascend Triton kernel with per-shape measurements and profiler evidence.

Validate an Ascend Triton candidate against a trusted reference with a declared case matrix and fallback gate.

Develop the first correct Ascend Triton kernel from a PyTorch reference or a GPU Triton implementation.

Coordinate complete Ascend Triton operator development, correctness validation and optimization with linked evidence.

Map a vLLM or vllm-ascend diff to sufficient correctness, build and performance evidence and summarize coverage.

Design and compare deterministic vLLM Ascend correctness cases across code states, execution modes and API paths.

Attribute Ascend HBM use during vLLM serving to weights, KV cache, HCCL, activations and runtime components.

Analyze Ascend profiler roots into rank, step, layer, block, operator and cross-rank findings with traceable evidence.

Plan and review one colocated vLLM Ascend service lifecycle, including source pairing, device selection, launch, health, and cleanup.

Measure one vLLM Ascend online-serving code state with warmup, repeated runs and normalized metrics.

Localize Ascend graph capture, replay or eager/graph divergence with controlled experiments and intermediate snapshots.